EPM3128ATC100-5N

Product Summary

The EPM3128ATC100-5N is a low-cost, high-performance EEPROM based on the Altera MAX architecture. Fabricated with advanced CMOS technology, the EPM3128ATC100-5N operates with a 3.3-V supply voltage and provides 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. The EPM3128ATC100-5N in the –4, –5, –6, –7, and –10 speed grades is compatible with the timing requirements of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification. The EPM3128ATC100-5N contains 32 to 512 macrocells, combined into groups of 16 macrocells called logic array blocks (LABs). Each macrocell has a programmable–AND/fixed–OR array and a configurable register with independently programmable clock, clock enable, clear, and preset functions.

Parametrics

EPM3128ATC100-5N absolute maximum ratings: (1)Supply voltage: –0.5V to 4.6V; (2)DC input voltage: –2.0V to 5.75V; (3)DC output current, per pin: –25mA to 25 mA; (4)Storage temperature: –65℃ to 150℃; (5)Ambient temperature: –65℃ to 135℃; (6)Junction temperature: 135℃.

Features

EPM3128ATC100-5N features: (1)PCI compatible; (2)Bus–friendly architecture including programmable slew–rate control; (3)Open–drain output option; (4)Programmable macrocell flipflops with individual clear, preset, clock, and clock enable controls; (5)Programmable power–saving mode for a power reduction of over 50% in each macrocell; (6)Configurable expander product–term distribution, allowing up to 32 product terms per macrocell; (7)Programmable security bit for protection of proprietary designs; (8)High–density PLDs ranging from 600 to 10,000 usable gates ; (9)4.5–ns pin–to–pin logic delays with counter frequencies of up to 227.3 MHz; (10)MultiVoltTM I/O interface enabling the device core to run at 3.3V, while I/O pins are compatible with 5.0–V, 3.3–V, and 2.5–V logic levels; (11)Pin counts ranging from 44 to 256 in a variety of thin quad flat pack (TQFP), plastic quad flat pack (PQFP), plastic J–lead chip carrier (PLCC), and FineLine BGATM packages; (12)Hot–socketing support; (13)Programmable interconnect array (PIA) continuous routing structure for fast, predictable performance; (14)Industrial temperature range.

Diagrams