(China (Mainland))
Product Summary
The ISPPAC-CLK5610V-01TN48I is an in-system programmable, zero-delay clock generator with universal fan-out buffer. Applications of the ISPPAC-CLK5610V-01TN48I include: Circuit board common clock generation and distribution, PLL-based frequency generation, High fan-out clock buffer, Zero-delay clock buffer.
Parametrics
ISPPAC-CLK5610V-01TN48I absolute maximum ratings: (1) Core Supply Voltage VCCD: -0.5 to 5.5V; (2) PLL Supply Voltage VCCA: -0.5 to 5.5V; (3) JTAG Supply Voltage VCCJ: -0.5 to 5.5V; (4) Output Driver Supply Voltage VCCO: -0.5 to 4.5V; (5) Input Voltage: -0.5 to 4.5V; (6) Output Voltage: -0.5 to 4.5V; (7) Storage Temperature: -65 to 150°C; (8) Junction Temperature with power supplied: -40 to 130°C.
Features
ISPPAC-CLK5610V-01TN48I features: (1) (1) 10MHz to 320MHz Input/Output Operation; (2) Low Output to Output Skew (<50ps); (3) Low Jitter Peak-to-Peak (<60ps) ; (4) Up to 20 Programmable Fan-out Buffers; (5) Exceptional Power Supply Noise Immunity; (6) Commercial (0 to 70°C) and Industrial (-40 to 85°C) Temperature Ranges.
Diagrams
| Image | Part No | Mfg | Description |  |
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 ISPPAC-CLK5610V-01TN48I |
Lattice |
Clock Drivers & Distribution PROGRAMMABLE ZERO DELAY CL GEN |
Data Sheet |
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| Image | Part No | Mfg | Description | |
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ispPAC 20 |
Other |
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Data Sheet |
Negotiable |
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ISPPAC10-01SI |
Lattice |
SPLD - Simple Programmable Logic Devices PROGRAMMABLE ANALOG CIRCUIT |
Data Sheet |
Negotiable |
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ISPPAC20-01JI |
Lattice |
SPLD - Simple Programmable Logic Devices PROGRAMMABLE ANALOG CIRCUIT |
Data Sheet |
Negotiable |
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ISPPAC20-01TI |
Lattice |
SPLD - Simple Programmable Logic Devices Not Upgrade Device CIRCUIT |
Data Sheet |
Negotiable |
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ISPPAC80-01PI |
Lattice |
SPLD - Simple Programmable Logic Devices PROGRAMMABLE ANALOG CIRCUIT |
Data Sheet |
Negotiable |
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ispPAC-CLK5308S-01TN48C |
Lattice |
Clock Drivers & Distribution ISP 0 Delay Unv Fan- Out Buf-Sngl End |
Data Sheet |
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