(China (Mainland))
Product Summary
The EPM5130LC-1 is a high-speed, high-density max 5000 device. The EPM5130LC-1 represents a revolutionary step in programmable logic: they combine innovative architecture and state-of-the-art process to offer optimum performance, logic density, flexibility, and the highest speeds and densities available in general-purpose reprogrammable logic. The EPM5130LC-1 is high-speed, high- density replacements for SSI and MSI TTL and CMOS packages and conventional PLDs.
Parametrics
EPM5130LC-1 absolute maximum ratings: (1)vcc Supply voltage With respect to GND See: -2.0 to 7.0 V; (2)Vpp Programming supply voltage: -2.0 to 13.5 V; (3)V| DC input voltage: -2.0 to 7.0 V; (4)IMAX DC Vcc or current: 200 mA; (5)Iout DC output current, per pin: -25 to 25 mA; (6)Pd Power dissipation: 1000 mW; (7)Tstg Storage temperature No bias: -65 to 150 ℃; (8)TAMB Ambient temperature Under bias: -65 to 135 ℃, Junction temperature Under bias: 150℃.
Features
EPM5130LC-1 features: (1)Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals; (2)The advanced MAX 5000 architecture combines the speed, ease of use, and familiarity of PAL devices with the density of programmable gate arrays; (3)MAX 5000 EPLDs provide 15-ns combinatorial delays, counter frequencies up to 100 MHz, pipelined data rates of 100 MHz, and high-complexity designs with true system clock rates up to 66 MHz; (4)Available in a wide variety of packages, including DIP, SOIC, J-lead, PGA, and QFP formats in windowed ceramic and plastic one-time- programmable versions; (5)MAX+PLUS and MAX+PLUS II PC- and workstation-based development tools compile large designs in minutes; (6)An industry-standard EDIF interface to workstation and third-party CAE tools is available; (7).
Diagrams
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EPM5128GM |
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Negotiable |
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EPM5128GM/883 |
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Negotiable |
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